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u8 | _pad [8] {} |
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u8 | ale_sequence [MAX_ALE_ENTRIES] {} |
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u64 | ale_table_phys {0} |
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constexpr u32 | arch::s390x::cpu::aste::ALET_ALEN_MASK = 0x0000'FFFFU |
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constexpr u32 | arch::s390x::cpu::aste::ALET_ALESN_MASK = 0x00FF'0000U |
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constexpr u32 | arch::s390x::cpu::aste::ALET_PRIMARY_LIST = 0x0100'0000U |
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constexpr u32 | arch::s390x::cpu::aste::ALET_RESERVED_MASK = 0xFE00'0000U |
| | Hardware ALET field masks in the 32-bit register image.
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constexpr u32 | arch::s390x::cpu::aste::ALET_RESERVED_MAX = 2 |
| | ALETs 0–2 are architecturally reserved (primary, secondary, home).
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u64 | duct_phys {0} |
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constexpr u32 | arch::s390x::cpu::aste::MAX_ALE_ENTRIES = 16 |
| | Maximum ALE entries in one domain's dispatchable-unit list. AR0 always selects primary space, leaving AR1-AR15 for portal ALETs.
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constexpr u32 | arch::s390x::cpu::aste::MAX_ASTE_ENTRIES = 256 |
| | Maximum ASTE table entries (one per domain).
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