arch.s390x.cpu.irq Module Reference

Data Structures
struct	arch::s390x::cpu::irq::irq_frame
	Interrupt frame saved by entry.S on every trap or interrupt. More...

Enumerations
enum	irq_class : u8 {   arch::s390x::cpu::irq::ZX_IRQ_CLASS_PGM = 0 , arch::s390x::cpu::irq::ZX_IRQ_CLASS_EXT = 1 , arch::s390x::cpu::irq::ZX_IRQ_CLASS_IO = 2 , arch::s390x::cpu::irq::ZX_IRQ_CLASS_MCCK = 3 ,   arch::s390x::cpu::irq::ZX_IRQ_CLASS_SVC = 4 }
	Interrupt class tag — identifies which lowcore new-PSW slot fired.

Typedefs
using	irqflags = u64

Functions
auto	arch::s390x::cpu::irq::irq_disable () noexcept -> void
auto	arch::s390x::cpu::irq::irq_enable () noexcept -> void
auto	arch::s390x::cpu::irq::irq_restore (const irqflags flags) noexcept -> void
	Restore PSW byte 0 from a saved irqflags. PSW byte 0 = bits 0-7 of the mask word = hi_word >> 24.
auto	arch::s390x::cpu::irq::irq_restore_mask_byte (const u8 byte0) noexcept -> void
auto	arch::s390x::cpu::irq::irq_save_disable () noexcept -> irqflags
auto	arch::s390x::cpu::irq::irqs_enabled () noexcept -> bool

Variables
u32	access_regs [16] {}
	Access registers ar0-ar15 (PoP §2-6).
u32	fpc {}
	Floating point control register (PoP §4-67).
u64	gprs [16] {}
	General-purpose registers r0–r15 at interrupt time.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_ARS = 0x90U
	Offset of the access register save area within the frame.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_FPC = 0xD0U
	Offset of the FPC save area within the frame.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_GPRS = 0x00U
	Offset of the GPR save area within the frame.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_PSW_ADDR = 0x88U
	Offset of the saved old PSW instruction address within the frame.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_PSW_MASK = 0x80U
	Offset of the saved old PSW mask word within the frame.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_SIZE = 0x02D8U
	Total size of the interrupt frame in bytes. 128 (GPRs) + 16 (PSW) + 64 (ARs) + 8 (FPC+pad) + 512 (VRs v0-v31) = 728 = 0x2D8.
constexpr u32	arch::s390x::cpu::irq::IRQ_FRAME_VRS = 0xD8U
	Offset of the vector register save area (v0-v15) within the frame.
constexpr u64	arch::s390x::cpu::irq::IRQ_RESTORE_MASK_LC = 0x0200UL
u32	pad {}
	Pad to 8-byte boundary.
u64	psw_addr {}
	Old PSW instruction address (hardware-saved, copied here).
u64	psw_mask {}
	Old PSW mask word (hardware-saved in lowcore, copied here).
u64	vector_regs_hi [16][2] {}
	Vector registers v16-v31 (upper half).
u64	vector_regs_lo [16][2] {}
	Vector registers v0-v15 (lower half).

Files
file	arch/s390x/cpu/irq.zcomponent/irq.cxxm
file	arch/s390x/cpu/irq.zcomponent/irq.cxx