arch.s390x.cpu.tx Module Reference

Data Structures
struct	arch::s390x::cpu::tx::tdb
	Transaction Diagnostic Block. More...
union	arch::s390x::cpu::tx::tdb_exception_code

Enumerations
enum class	tdb_abort_code : u64 {   external_int = 2 , pgm_int = 4 , mcck_int = 5 , io_int = 6 ,   fetch_overflow = 7 , store_overflow = 8 , fetch_conflict = 9 , store_conflict = 10 ,   restricted_inst = 11 , pgm_int_condition = 12 , nesting_depth_exceeded = 13 , cache_fetch_related = 14 ,   cache_store_related = 15 , cache_other = 16 , guarded_storage_event = 19 , misc_condition = 255 }
enum class	tdb_format : u8 { unpredictable = 0 , format1 = 1 }

Functions
	arch::s390x::cpu::tx::assert_size (tdb, 256)
auto	arch::s390x::cpu::tx::available () noexcept -> bool
	Check that TX is installed and enabled for this CPU.
	bytersvd (tobytes(dw, 9))
	bytersvd (tobytes(hw, 1))
	bytersvd (tobytes(w, 1))
auto	arch::s390x::cpu::tx::constrained_available () noexcept -> bool
	Check that constrained TX is installed and TX is enabled.
auto	arch::s390x::cpu::tx::depth () noexcept -> u32
	Abort the current transaction with the given abort code.
auto	arch::s390x::cpu::tx::nontx_store (u64 *addr, u64 value) noexcept -> bool
	Nontransactional store — writes a 64-bit value outside the transaction's isolation domain (useful for abort counters, logs).
auto	arch::s390x::cpu::tx::tabort (u64 code) noexcept -> void
template<u16 Ctrl = TBEGIN_GRSM_DEFAULT>
auto	arch::s390x::cpu::tx::tbegin () noexcept -> condition_code
	Begin a non-constrained transaction (no TDB).
template<u16 Ctrl = TBEGIN_GRSM_DEFAULT>
auto	arch::s390x::cpu::tx::tbegin (tdb &tdb_ref) noexcept -> condition_code
	Begin a non-constrained transaction with TDB diagnostic block.
auto	arch::s390x::cpu::tx::tbeginc () noexcept -> condition_code
	Begin a constrained transaction (facility 50).
auto	arch::s390x::cpu::tx::tend () noexcept -> bool
	Commit the innermost transaction.

Variables
u64	aborted_transaction_inst_addr {}
u64	breaking_event_addr {}
u64	conflict_token {}
trap::pgm::data_exception_code	dxc
u8	exception_access_id {}
tdb_exception_code	exception_code
u8   flags {}
tdb_format	format {}
std::array< u64, 16 >	general_registers
u32	program_int_id {}
constexpr u16	arch::s390x::cpu::tx::TBEGIN_AR_ALLOWED = 0x0008
	Allow AR modification in the I2 control field.
constexpr u16	arch::s390x::cpu::tx::TBEGIN_FLOAT_ALLOWED = 0x0004
	Allow floating-point/vector operation in the I2 control field.
constexpr u16	arch::s390x::cpu::tx::TBEGIN_GRSM_ALL = 0xFF00
	GR save mask that also saves r0 (bits 0-15 of I2).
constexpr u16	arch::s390x::cpu::tx::TBEGIN_GRSM_DEFAULT = 0xFE00
	Default GR save mask: save register pairs 2-15, no AR/FP mods.
tdb_abort_code	transaction_abort_code {}
u16	transaction_nesting_depth {}
teid::teid	translation_exception_id
constexpr i32	arch::s390x::cpu::tx::TX_CC_INDETERMINATE = 1
	Indeterminate condition abort.
constexpr i32	arch::s390x::cpu::tx::TX_CC_PERSISTENT = 3
	Persistent abort (retry will not help).
constexpr i32	arch::s390x::cpu::tx::TX_CC_SUCCESS = 0
	CC values returned by tbegin() / tbeginc().
constexpr i32	arch::s390x::cpu::tx::TX_CC_TRANSIENT = 2
	Transient abort (retry may succeed).
constexpr i32	arch::s390x::cpu::tx::TX_CC_UNAVAILABLE = -1
	Facility or CR0.TXC disabled.
trap::pgm::vector_exception_code	vxc

Files
file	arch/s390x/cpu/tx.cxxm
	Verified z/Architecture transactional execution primitives.