Functions | |
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template<dat_level Level> requires (Level != dat_level::page) | |
| constexpr auto | arch::s390x::mmu::asce_type_code () noexcept -> u64 |
| ASCE type code for a given root level. | |
| constexpr auto | arch::s390x::mmu::pte_frame (u64 val) noexcept -> u64 |
| constexpr auto | arch::s390x::mmu::pte_is_invalid (u64 val) noexcept -> bool |
| constexpr auto | arch::s390x::mmu::pte_make (u64 phys, page_prot prot) noexcept -> u64 |
| Construct a valid PTE from physical frame + protection. | |
| constexpr auto | arch::s390x::mmu::r3_is_large (u64 val) noexcept -> bool |
| constexpr auto | arch::s390x::mmu::r3_large_make (u64 phys, page_prot prot) noexcept -> u64 |
| Construct a 2 GiB large-page region-3 entry (RTTE FC=1, EDAT-2). | |
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template<dat_level Level> requires (Level != dat_level::page) | |
| constexpr auto | arch::s390x::mmu::rste_empty () noexcept -> u64 |
| Invalid (empty) entry value for a CRST table at a given level. | |
| constexpr auto | arch::s390x::mmu::rste_empty_rt (dat_level lvl) noexcept -> u64 |
| Runtime empty-entry value. | |
| constexpr auto | arch::s390x::mmu::rste_is_invalid (u64 val) noexcept -> bool |
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template<dat_level Level> requires (Level != dat_level::page) | |
| constexpr auto | arch::s390x::mmu::rste_make (u64 child_phys) noexcept -> u64 |
| Construct a valid CRST entry pointing to a child table. | |
| constexpr auto | arch::s390x::mmu::rste_make_rt (dat_level lvl, u64 child_phys) noexcept -> u64 |
| Runtime CRST entry construction. | |
| constexpr auto | arch::s390x::mmu::rste_origin (u64 val) noexcept -> u64 |
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template<dat_level Level> requires (Level != dat_level::page) | |
| constexpr auto | arch::s390x::mmu::rste_type_code () noexcept -> u64 |
| CRST type code for a given dat_level. | |
| constexpr auto | arch::s390x::mmu::rste_type_code_rt (dat_level lvl) noexcept -> u64 |
| Runtime CRST type code. | |
| constexpr auto | arch::s390x::mmu::seg_is_large (u64 val) noexcept -> bool |
| constexpr auto | arch::s390x::mmu::seg_large_make (u64 phys, page_prot prot) noexcept -> u64 |
| Construct a 1 MiB large-page segment entry (STE FC=1, EDAT-1). | |
Variables | |
| constexpr u64 | arch::s390x::mmu::ASCE_ALT_EVENT = 0x080ULL |
| PoP bit 56: S. | |
| constexpr u64 | arch::s390x::mmu::ASCE_LENGTH_MASK = 0x003ULL |
| PoP bits 62-63: TL. | |
| constexpr u64 | arch::s390x::mmu::ASCE_ORIGIN_MASK = ~0xFFFULL |
| PoP bits 0-51. | |
| constexpr u64 | arch::s390x::mmu::ASCE_PRIVATE = 0x100ULL |
| PoP bit 55: P. | |
| constexpr u64 | arch::s390x::mmu::ASCE_REAL_SPACE = 0x020ULL |
| PoP bit 58: R. | |
| constexpr u64 | arch::s390x::mmu::ASCE_SPACE_SWITCH = 0x040ULL |
| PoP bit 57: X. | |
| constexpr u64 | arch::s390x::mmu::ASCE_SUBSPACE_GROUP = 0x200ULL |
| PoP bit 54: G. | |
| constexpr u64 | arch::s390x::mmu::ASCE_TYPE_MASK = 0x00CULL |
| PoP bits 60-61: DT. | |
| constexpr u64 | arch::s390x::mmu::ASCE_TYPE_R1 = 0x00CULL |
| DT=11: region-first. | |
| constexpr u64 | arch::s390x::mmu::ASCE_TYPE_R2 = 0x008ULL |
| DT=10: region-second. | |
| constexpr u64 | arch::s390x::mmu::ASCE_TYPE_R3 = 0x004ULL |
| DT=01: region-third. | |
| constexpr u64 | arch::s390x::mmu::ASCE_TYPE_SEG = 0x000ULL |
| DT=00: segment. | |
| constexpr page_prot | arch::s390x::mmu::PAGE_KERNEL_RO {PTE_PROTECT | PTE_NOEXEC} |
| RO, NX. | |
| constexpr page_prot | arch::s390x::mmu::PAGE_KERNEL_RW {PTE_NOEXEC} |
| RW, NX. | |
| constexpr page_prot | arch::s390x::mmu::PAGE_KERNEL_RWX {0} |
| RWX (avoid). | |
| constexpr page_prot | arch::s390x::mmu::PAGE_KERNEL_RX {PTE_PROTECT} |
| RO, X (code). | |
| constexpr u64 | arch::s390x::mmu::PTE_BIT52_ZERO = 0x800ULL |
| PoP bit 52: must be zero in PTE. | |
| constexpr u64 | arch::s390x::mmu::PTE_EMPTY = PTE_INVALID |
| Empty (invalid) PTE — used to initialize page tables. | |
| constexpr u64 | arch::s390x::mmu::PTE_IEP = 0x100ULL |
| PoP bit 55: IEP control. | |
| constexpr u64 | arch::s390x::mmu::PTE_INVALID = 0x400ULL |
| PoP bit 53: page-invalid. | |
| constexpr u64 | arch::s390x::mmu::PTE_NOEXEC = PTE_IEP |
| Alias: IEP bit doubles as no-execute for kernel page_prot. | |
| constexpr u64 | arch::s390x::mmu::PTE_ORIGIN_MASK = ~0xFFFULL |
| PoP bits 0-51: PFRA. | |
| constexpr u64 | arch::s390x::mmu::PTE_PROTECT = 0x200ULL |
| PoP bit 54: DAT-protection. | |
| constexpr u64 | arch::s390x::mmu::R3_FC = 0x400ULL |
| RTTE format-control bit (PoP bit 53) — EDAT-2 2 GiB direct mapping. | |
| constexpr u64 | arch::s390x::mmu::R3_LARGE = R3_FC |
| Alias for R3_FC. | |
| constexpr u64 | arch::s390x::mmu::R3_LARGE_ORIGIN = ~0x7FFFFFFFULL |
| 2 GiB-aligned RFAA mask: PoP bits 0-32, 31 zeros appended. | |
| constexpr u64 | arch::s390x::mmu::RSTE_COMMON = 0x010ULL |
| PoP bit 59: CS/CR (common segment/region). | |
| constexpr u64 | arch::s390x::mmu::RSTE_IEP = 0x100ULL |
| PoP bit 55: IEP (FC=1 only). | |
| constexpr u64 | arch::s390x::mmu::RSTE_INVALID = 0x020ULL |
| PoP bit 58: invalid. | |
| constexpr u64 | arch::s390x::mmu::RSTE_LENGTH_FULL = 0x003ULL |
| Table length — full 2048 entries (PoP bits 62-63 = 0b11). Table size = (TL+1) × 4096 bytes = (TL+1) × 512 entries. | |
| constexpr u64 | arch::s390x::mmu::RSTE_NOEXEC = RSTE_IEP |
| Alias: IEP bit doubles as no-execute for kernel page_prot. | |
| constexpr u64 | arch::s390x::mmu::RSTE_ORIGIN_MASK = ~0xFFFULL |
| Origin mask for region-table entries: PoP bits 0-51, 12 zeros. | |
| constexpr u64 | arch::s390x::mmu::RSTE_PROTECT = 0x200ULL |
| PoP bit 54: DAT-protection. | |
| constexpr u64 | arch::s390x::mmu::RSTE_TABLE_OFF_MASK = 0x0C0ULL |
| PoP bits 56-57: table offset (TF). | |
| constexpr u64 | arch::s390x::mmu::RSTE_TYPE_MASK = 0x00CULL |
| PoP bits 60-61: table type (TT). | |
| constexpr u64 | arch::s390x::mmu::RSTE_TYPE_R1 = 0x00CULL |
| TT=11: region-first table. | |
| constexpr u64 | arch::s390x::mmu::RSTE_TYPE_R2 = 0x008ULL |
| TT=10: region-second table. | |
| constexpr u64 | arch::s390x::mmu::RSTE_TYPE_R3 = 0x004ULL |
| TT=01: region-third table. | |
| constexpr u64 | arch::s390x::mmu::RSTE_TYPE_SG = 0x000ULL |
| TT=00: segment table. | |
| constexpr u64 | arch::s390x::mmu::SEG_FC = 0x400ULL |
| STE format-control bit (PoP bit 53) — EDAT-1 1 MiB direct mapping. | |
| constexpr u64 | arch::s390x::mmu::SEG_LARGE = SEG_FC |
| Alias for SEG_FC. | |
| constexpr u64 | arch::s390x::mmu::SEG_LARGE_ORIGIN = ~0xFFFFFULL |
| 1 MiB-aligned SFAA mask: PoP bits 0-43, 20 zeros appended. | |
| constexpr u64 | arch::s390x::mmu::STE_PTO_MASK = ~0x7FFULL |
| Origin mask for segment-table PTO: PoP bits 0-52, 11 zeros. The STE page-table origin includes one more bit than CRST origins. | |
Files | |
| file | arch/s390x/mmu/consts.cxxm |