5export module arch.s390x.trap.pgm;
6import arch.s390x.cpu.irq;
7import zxfoundation.base.types;
12namespace arch::s390x::trap::pgm {
14 constexpr u16 PGM_OPERATION = 0x0001;
15 constexpr u16 PGM_PRIVILEGED_OP = 0x0002;
16 constexpr u16 PGM_EXECUTE = 0x0003;
17 constexpr u16 PGM_PROTECTION = 0x0004;
18 constexpr u16 PGM_ADDRESSING = 0x0005;
19 constexpr u16 PGM_SPECIFICATION = 0x0006;
20 constexpr u16 PGM_DATA = 0x0007;
21 constexpr u16 PGM_FIXED_PT_DIVIDE = 0x0009;
22 constexpr u16 PGM_DECIMAL_DIVIDE = 0x000A;
23 constexpr u16 PGM_HFP_EXP_UNDERFLOW = 0x000B;
24 constexpr u16 PGM_HFP_EXP_OVERFLOW = 0x000C;
25 constexpr u16 PGM_HFP_SIGNIFICANCE = 0x000D;
26 constexpr u16 PGM_HFP_DIVIDE = 0x000E;
27 constexpr u16 PGM_SEGMENT_TRANS = 0x0010;
28 constexpr u16 PGM_PAGE_TRANS = 0x0011;
29 constexpr u16 PGM_SPECIAL_OPERATION = 0x0013;
30 constexpr u16 PGM_EX_TRANSLATION = 0x0023;
31 constexpr u16 PGM_LX_TRANSLATION = 0x0022;
32 constexpr u16 PGM_LFX_TRANSLATION = 0x0028;
33 constexpr u16 PGM_LSX_TRANSLATION = 0x0029;
34 constexpr u16 PGM_LFX_UNMAPPED = 0x002C;
35 constexpr u16 PGM_LSX_UNMAPPED = 0x002E;
36 constexpr u16 PGM_TRANSACTION_CONSTRAINT = 0x0218;
37 constexpr u16 PGM_TRANSACTION_ABORT = 0x0200;
38 constexpr u16 PGM_REGION_FIRST_TRANS = 0x0039;
39 constexpr u16 PGM_REGION_SECOND_TRANS= 0x003A;
40 constexpr u16 PGM_REGION_THIRD_TRANS = 0x003B;
41 constexpr u16 PGM_ASCE_TYPE = 0x0038;
42 constexpr u16 PGM_MONITOR = 0x0040;
43 constexpr u16 PGM_TRANSLATION_SPEC = 0x0012;
44 constexpr u16 PGM_FIXED_PT_OVERFLOW = 0x0008;
45 constexpr u16 PGM_HFP_SIGN_BIT = 0x000F;
46 constexpr u16 PGM_ALT_TRANSLATION = 0x0026;
47 constexpr u16 PGM_ALFX_TRANSLATION = 0x0027;
48 constexpr u16 PGM_ALFX_SUPER = 0x002A;
49 constexpr u16 PGM_STACK_OVERFLOW = 0x0035;
50 constexpr u16 PGM_AFX_TRANSLATION = 0x0020;
51 constexpr u16 PGM_ASX_TRANSLATION = 0x0021;
52 constexpr u16 PGM_EX_TRANSLATION_V = 0x0023;
53 constexpr u16 PGM_VECTOR_OP = 0x001C;
54 constexpr u16 PGM_VECTOR_EMAX = 0x001D;
55 constexpr u16 PGM_VECTOR_ENR = 0x001E;
56 constexpr u16 PGM_VECTOR_ERTE = 0x001F;
58 enum class vector_interruption_code : u8 {
59 ieee_invalid_operation = 0b0001,
60 ieee_division_by_zero = 0b0010,
61 ieee_overflow = 0b0011,
62 ieee_underflow = 0b0100,
63 ieee_inexact = 0b0101,
64 integer_divide = 0b1000,
67 union [[gnu::packed]] vector_exception_code {
71 bitlimit(vector_interruption_code vic, 4);
74 assert_size(vector_exception_code, 1);
76 enum class data_exception_code : u8 {
77 general_operand = 0x00,
79 bfp_instruction = 0x02,
80 dfp_instruction = 0x03,
81 quantum_exception = 0x04,
82 simulated_quantum_exception = 0x07,
83 ieee_inexact_and_truncated = 0x08,
84 simulated_ieee_inexact = 0x0B,
85 ieee_inexact_and_incremented = 0x0C,
86 ieee_underflow_exact = 0x10,
87 simulated_ieee_underflow_exact = 0x13,
88 ieee_underflow_inexact_and_truncated = 0x18,
89 simulated_ieee_underflow_inexact = 0x1B,
90 ieee_underflow_inexact_and_incremented = 0x1C,
91 ieee_overflow_exact = 0x20,
92 simulated_ieee_overflow_exact = 0x23,
93 ieee_overflow_inexact_and_truncated = 0x28,
94 simulated_ieee_overflow_inexact = 0x2B,
95 ieee_overflow_inexact_and_incremented = 0x2C,
96 ieee_division_by_zero = 0x40,
97 simulated_ieee_division_by_zero = 0x43,
98 ieee_invalid_operation = 0x80,
99 simulated_ieee_invalid_operation = 0x83,
100 vector_instruction = 0xFE,
101 compare_and_trap_instruction = 0xFF,
104 [[nodiscard]]
constexpr auto vxc_pgm_name_for(
const vector_exception_code vxc)
noexcept -> std::string_view;
106 [[nodiscard]]
constexpr auto dxc_pgm_name_for(
const u8 code)
noexcept -> std::string_view;
108 [[nodiscard]]
constexpr auto master_pgm_name_for(
const u16 code)
noexcept -> std::string_view;
111 auto handle(cpu::irq::irq_frame* frame)
noexcept ->
void;