z/Architecture control register store/load/set/clear wrappers. More...
Data Structures | |
| union | arch::s390x::cpu::ctlreg::cr0 |
| union | arch::s390x::cpu::ctlreg::cr15 |
| union | arch::s390x::cpu::ctlreg::cr2 |
| union | arch::s390x::cpu::ctlreg::cr5 |
| struct | arch::s390x::cpu::ctlreg::ctlreg |
Functions | |
| template<u32 Reg> | |
| auto | arch::s390x::cpu::ctlreg::ctl_clear_bit (const u32 bit) noexcept -> void |
| Clear a single bit (IBM MSB numbering) in a control register. | |
| template<u32 Low, u32 High, typename T> requires (Low <= 15 && High <= 15 && Low <= High && sizeof(T) >= (High - Low + 1) * 8) | |
| auto | arch::s390x::cpu::ctlreg::ctl_load (const T &storage) noexcept -> void |
| Load control registers [Low..High] from a storage area (LCTLG). | |
| template<u32 Reg> | |
| auto | arch::s390x::cpu::ctlreg::ctl_set_bit (const u32 bit) noexcept -> void |
| Set a single bit (IBM MSB numbering) in a control register. | |
| template<u32 Low, u32 High, typename T> requires (Low <= 15 && High <= 15 && Low <= High && sizeof(T) >= (High - Low + 1) * 8) | |
| auto | arch::s390x::cpu::ctlreg::ctl_store (T &storage) noexcept -> void |
| Store control registers [Low..High] into a storage area (STCTG). | |
z/Architecture control register store/load/set/clear wrappers.
SPDX-License-Identifier: Apache-2.0
|
exportnoexcept |
Clear a single bit (IBM MSB numbering) in a control register.
| Reg | Control register index (0–15). |
| bit | Bit number in IBM MSB-0 notation. |
|
exportnoexcept |
Load control registers [Low..High] from a storage area (LCTLG).
| Low | Starting control register index (0–15). |
| High | Ending control register index (0–15), must be ≥ Low. |
| T | Storage type; sizeof(T) must cover (High-Low+1) × 8 bytes. |
| storage | Input buffer containing the new register values. |
|
exportnoexcept |
Set a single bit (IBM MSB numbering) in a control register.
| Reg | Control register index (0–15). |
| bit | Bit number in IBM MSB-0 notation (bit 0 = MSB of the 64-bit register). |
|
exportnoexcept |
Store control registers [Low..High] into a storage area (STCTG).
| Low | Starting control register index (0–15). |
| High | Ending control register index (0–15), must be ≥ Low. |
| T | Storage type; sizeof(T) must cover (High-Low+1) × 8 bytes. |
| storage | Output buffer to receive the register values. |