64-bit z/Architecture PSW (16 bytes, 8-byte aligned per PoP §4.2). More...
Data Fields | |
| u64 | addr {} |
| Instruction address (bits 64–127). | |
| u64 | mask {} |
| PSW mask word (bits 0–63 per PoP Figure 4-1). | |
64-bit z/Architecture PSW (16 bytes, 8-byte aligned per PoP §4.2).